Field
The present application relates generally to the operation and design of capacitors, and more particularly, to the operation and design of MOS capacitors with improved linearity.
Background
Metal oxide semiconductor (MOS) capacitors are used in many applications, such as in analog filters. MOS capacitors are much denser than metal-on-metal (MOM) capacitors and therefore can be used in place of MOM capacitors to save circuit area. For example, the ratio of capacitance to area is almost five times greater for a MOS capacitor than for a MOM capacitor.
Unfortunately, MOS capacitors may exhibit non-linearity caused by capacitance variation with respect to voltage. For example, the capacitance provided by a MOS capacitor changes as the voltage across the capacitor changes. This nonlinearity mainly happens during MOS capacitor transition from depletion to oxide region and vice versa when capacitor voltage varies. One technique to improve linearity is similar to a multi-tan technique in which multiple stages are added together while some of the MOS capacitors are moving from oxide to depletion region and the rest are moving from depletion to oxide region. This results in reduced capacitor variation. Unfortunately, this technique provides only limited improvement. Thus, MOS capacitors may not be suitable for use in applications having large voltage swings across the capacitor where high linearity is necessary.
Therefore, it is desirable to have a MOS capacitor with improved linearity for use in applications where high linearity is necessary, thereby allowing circuit area savings to be realized.